FAQ

Compliance

My product passed the tests at the last Compliance Workshop but I do not find my product on the Integrators List yet, am I missing something?

Two things are required to get a product on the Integrators List. The first is passing the required Compliance Workshop tests (both compliance and interoperability tests) and the second is to submit a correctly filled out Product Listing Request Form. If your product passed all of the testing requirements, then it is possible PCI-SIG has not yet received your Product Request Form. We require that you fill out an electronic copy of the Product Listing Request Form and send to compliance@pcisig.com. The Product Listing Request form is provided on the PCI-SIG website on our Developers web page and can also be accessed directly by clicking on the above link.

Now that Compliance Checklists are no longer required as one of the requirements for a product to be added to the Integrators List, why does the PCI-SIG now require submission of a Product Listing Request Form following a Compliance Workshop?
The Product Listing Request Form provides a means for each company to indicate their preference as to how they would like their qualifying product/s listed. It also allows each company some control as to when their product/s will be listed. Waiting to submit the Product Listing Request Form ensures that products will not be added to the Integrators list until they are ready.
The product I am bringing to the plugfest is a Compliance Workshop. What are the usual procedures at a workshop that PCI-SIG provides to help us control access to our products which we bring to the workshop?
Overall, each vendor is responsible for maintaining their own desired level of confidentiality for their products at a Compliance Workshop. The PCI-SIG does provide some basic procedures that should be helpful to vendors in accomplishing this. When submitting products for testing, each vendor provides their own naming convention for the product to be tested. The product name can be as descriptive or as abstract as the vendor desires. Testing at the Compliance Workshop is usually handled within private testing rooms at a hotel. Each vendor participant doing testing is issued a badge with the person's name and company name. Testing participants should limit access to the test rooms to only participants that have a proper badge. Testing with a specific vendor is optional.

PCI Conventional

What is the difference between version 2.3 and version 3.0 of the Conventional PCI? specification?
Version 3.0 is an evolutionary release of the PCI specification that includes edits to provide better readability and incorporate Engineering Change Notices (ECNs) that have been developed since the release of version 2.3. The Conventional PCI 3.0 specification also completes the migration to 3.3V-only slots by removing support for 5.0V-only keyed add-in cards. Version 3.0 is the current standard for Conventional PCI, to which vendors should be developing products
How do ECNs affect the base specification? What ECNs were incorporated into the Conventional PCI 3.0 specification?
ECNs (Engineering Change Notifications) are improvements to the specification that are officially approved, but don't demand a full-scale revision to the specification. The list of ECNs that were incorporated into version 3.0 of the specification is included within the specification.
What is a Universal Card? Does version 3.0 support Universal Cards?
Universal Cards are cards that have two keys, which provide a means for vendors to design one card that supports both 3.3V and 5.0V slots. Version 3.0 of the PCI specification removes support for 5.0V-only adapter slots. However, both the Universal Cards and 3.3V Cards continue to be supported by the Conventional PCI 3.0 specification.
Do other PCI specifications rely on the Conventional PCI 3.0 specification?
PCI Version 3.0 continues to provide the backbone technology for multiple bus specifications: PCI-X, PCI Hot-Plug, Low Profile PCI, and Mini PCI.
When will the next Compliance Workshop be held to test for PCIe 3.0 compliance?
See the latest schedule of Compliance Workshops and their locations on our Events web page.
How does a customer know whether or not a product is compliant with the current specification?
Developers of PCI products are bound by an honor code to ensure that their products are compliant to the most current version of the PCI specification. A list of products that have passed Compliance and Interoperability testing at previous Compliance Workshops, known as the Integrators List, is available on our Integrators List web page.
Where can I get version 3.0 of the Conventional PCI specification?
Specifications are available online to PCI-SIG members on our Specifications web page.
How do I get technical support for the PCI 3.0 specification?
Technical support is one of the many benefits of membership. Send your questions to pcitech@pcisig.com.

General Information

How can I order PCI specifications?
Information on ordering PCI specifications is available on our Ordering Information web page.
Where can I obtain PCI-SIG specifications?
Specifications are available on our Specifications web page for members and can be ordered by non-members from our Ordering Information web page.
How do I get technical support for PCI specifications or ask other PCI technical questions??
Technical support for PCI-SIG specifications is one of the many benefits of membership. Technical Support may be reached at pcitech@pcisig.com.
How do I request a password?
If your company is a member and you are visiting for the first time, select the Members Log In link from the Membership drop-down menu and select Register Now! to receive a username and password. If you have forgotten your password, select the Forgot your password? link to receive a new password.
How do I contact the PCI-SIG office?

Please use the Contact Us form available on our Contact Us web page.

What are the requirements for PCI-SIG membership?

Membership information is available on our Membership web page.

How do I get a vendor ID number?
Vendor ID assignments are given upon joining PCI-SIG.
Who controls the development and enhancement of the PCI bus specification?
PCI-SIG is the industry organization that is chartered with maintenance of the PCI bus specification. Formed in June 1992, PCI-SIG effectively places ownership and management of the PCI specifications in the hands of the developer community. PCI-SIG works to support new requirements to the specification while maintaining backward compatibility for all PCI revisions and addenda. PCI-SIG works on behalf of the entire industry, not specific vendor interests.
Where is the list of PCI vendor IDs?

A list of the vendor IDs issued to current members can be found on our Member Companies web page.

How does a customer know whether or not a product is compliant with the current specification?
Developers of PCI products are bound by an honor code to ensure that their products are compliant to the most current version of the PCI specification. A list of compliant products, known as the Integrators List, is available to members only at PCI-SIG's website at www.pcisig.com.
What are the benefits of PCI-SIG membership?
PCI-SIG membership is an important element in developing PCI products. Only PCI-SIG members are allowed to participate in compliance workshops and technology seminars, they receive free technical support and automated updates on ECNs, and they are proactively informed of ongoing news of the PCI-SIG and the development of PCI products and specifications.
Is PCI-SIG primarily a U.S. organization?
PCI-SIG is a global organization bringing benefits and technical support to companies throughout Europe, Japan, Asia and North America. The PCI-SIG engages in workshops and seminars for its international members in order to keep the global developer audience up to date on PCI technology. PCI-SIG currently has more than 900 member companies.
How do I subscribe or unsubscribe to the PCI mailing lists?

Please email administration@pcisig.com with your request.

Where is the PCI specifications order form?

The order form is available on our Ordering Information web page.

How do I pay via credit card?

PCI-SIG utilizes a secure online portal for credit card payments. Entering your credit card information authorizes PCI-SIG to charge your card the amount invoiced.

Does PCI-SIG support Open Source projects related to the PCI Specifications?‎

PCI-SIG does not currently support any Open Source projects.  The use of Open ‎Source code that implements all or a portion or portions of the PCI Specification is at the users own risk, ‎and PCI-SIG disclaims any liability associated with such unaffiliated and unsponsored code.  ‎Typically, Open Source projects have their own licensing terms that would apply to use of ‎code, and the fact that code or code segments reference or implement portions of PCI ‎Specifications give rise to no relationship between PCI-SIG and such Open Source projects.‎  PCI-SIG recommends members seek legal advice to determine that they can comply with legal requirements imposed by applicable licenses when using such Open Source projects.

Who leads the PCI-SIG?
PCI-SIG is led by a Board of Directors whose current members are listed on our Board of Directors web page.
How do ECNs affect the base specification?
ECNs are improvements to the specification that are officially approved by PCI-SIG yet don't demand a full-scale revision to the specification. All approved ECNs are considered part of the current specification and must be implemented to maintain compliance. For a list of the most current ECNs, please visit our Specifications web page.

PCI Express

How does PCI-SIG ensure product interoperability?

PCI-SIG holds regular Compliance Workshops in various locations around the world to satisfy the needs of its members. These workshops are intended for members to demonstrate their product's interoperability with those of other PCI-SIG members. Member products that successfully demonstrate interoperability at a workshop are listed on the PCI-SIG Integrators List. Member products that conform to the PCI Express architecture may use the PCI Express logo (registered trademark of PCI-SIG) subject to the PCI-SIG Trademark and Logo Usage Guidelines.

What is the PCI Express x16 Graphics 150W-ATX 1.0 Specification?
PCI Express x16 Graphics 150W-ATX 1.0 is a supplementary specification to the PCI Express architecture specification specifically for delivery for higher performance capabilities for the next generation of platforms with leading-edge graphics and multimedia applications. The specification considers power and thermal issues in these platforms and provides a solution space for designers of these systems.
Who developed the ExpressCard standard?
The ExpressCard standard was created by a broad coalition of PCMCIA member companies, including Dell, Hewlett Packard, IBM, Intel, Lexar Media, Microsoft, SCM Microsystems and Texas Instruments. PCMCIA developed the new standard with assistance from the USB Implementers Forum (USB-IF) and PCI-SIG. PCMCIA was a non-profit trade association founded in 1989 to establish technical standards for PC Card technology and to promote interchangeability among computer systems. In 2010, PCMCIA transferred its technology assets to the USB-IF and dissolved as an organization.
How can PCI Express developers build components that can be integrated into ExpressCard products?
First, developers must use silicon that has passed the PCI-SIG compliance program. PCI Express components that successfully pass the PCI-SIG compliance tests may be useable in an ExpressCard module if they allow for a module design which meets the additional requirements (e.g., power management, power and thermal) detailed in the ExpressCard standard.
What is the compliance program for ExpressCard products?
The ExpressCard compliance program is now being run by the USB-IF. For full details, visit https://www.usb.org/members.
What is the PCI Express Wireless Form Factor (WFF)?
WFF is a form factor being developed within PCI-SIG by member companies focused on the unique requirements associated with integrating existing and new wireless technology into a wide range of usage models, e.g. portable notebook computers.
How does ExpressModule improve the way Servers and Workstations are built and serviced?
The ExpressModule form factor provides Servers and Workstations with a modular I/O adapter that is closed chassis hot-pluggable. The design of ExpressModule frees the I/O adapter from direct connection to the system board, thus allowing greater flexibility in system design. Server I/O Modules can be placed in the front or back of the system, vertical or horizontal, or above system I/O board. The Server I/O Modules flow-through cooling model increases system venting while providing adapter developers an airflow scheme, thus improving reliability for both adapters and systems. The standard management features promote remote service while the modular enclosure enables customer service and upgrades.
What is the PCI Express ExpressModule?
The ExpressModule Specification is a PCI Express modular form factor defined for Servers & Workstations. Its ease-of-use packaging and integrated features provide benefits to many customers and system integrators (OEM, IHV, VAR and End-users). The ExpressModule enables and promotes fundamental improvements in the way Servers & Workstations are built and serviced.
What and how many PCI Express architecture specifications are there?
The PCI Express architecture suite of specifications can be described as follows: PCI Express Base Specification: the core specification for the multi-layered PCI Express architecture. It is currently at revision 1.1. PCI Express Card Electromechanical Specification: the ATX-based form factors. PCI Express Mini Card Electromechanical Specification: the BTO/CTO mobile platform form factor. PCI Express to PCI/PCI-X? Bridge Specification: the bridging architecture to enable PCI Express components to function with legacy PCI devices. PCI Express x16 Graphics 150W-ATX: the considerations for power and thermal issues in the next generation of platforms with leading-edge graphics and multimedia applications to deliver higher performance capabilities. PCI Express ExpressModule?: a hot-pluggable modular form factor defined for servers and workstations.
What prompted the creation of PCI Express architecture?
The interconnect demands of emerging computing and communications platforms exceed the capabilities of traditional parallel buses such as PCI. Innovations such as 10 GHz and higher CPU speeds, faster memories, high-end graphics, gigabit networking and storage interfaces, and high-performance consumer devices have driven the need for a system interconnect with much greater bandwidth scalability and lower cost of implementation. PCI Express architecture uniquely meets these varying market segment requirements.
What is the PCI Express (PCIe) architecture?
  • PCI Express architecture is an industry standard high-performance, general-purpose serial I/O interconnect designed for use in enterprise, desktop, mobile, communications and embedded platforms. It has many state-of-the-art attributes, including:
    • PCI compatibility using the established PCI software programming models, thus facilitating a smooth transition to new hardware while allowing software to evolve to take advantage of PCI Express features
    • A cost-effective, low-pin count interface offering maximum bandwidth per pin, reducing cost and design complexity and enabling smaller form factors
    • Scalable bandwidth of 16.0 GB/s at its initial signaling rate of 2.5 GHz with much higher transfer rates in the future using higher frequency signaling technologies
    • Support for multiple interconnect widths via 1, 2, 4, 8, 12, 16 and 32 lane configurations aggregated to match application bandwidth needs Support for new and innovative, hot-plug/hot-swap add-in card and module devices
    • Unique, advanced features such as Power Management, Quality of Service and other native functions not available in other I/O architectures
What is the PCI Express External Cable specification?
The PCI Express External Cabling specification was developed to address multiple market segment cable requirements to extend PCI Express protocol and functionality across arbitrary distances and packaging that cannot be met using existing backplane trace connectivity.
What is ExpressCard technology?
ExpressCard technology is the name of a standard introduced by PCMCIA in Spring 2003. The ExpressCard standard promises to deliver thinner, faster and lighter modular expansion to desktop and notebook computer users. Consumers will be able to add hardware capabilities such as memory, wired and wireless communications and security features by simply inserting a module into their systems. All ExpressCard slots will accommodate modules designed to use either Universal Serial Bus (USB) 2.0, or the emerging PCI Express standards. Over time ExpressCard technology is expected to become the preferred solution for hot-pluggable internal I/O expansion for desktop and mobile computers.

PCI Express - 2.0

Section 2.2.62. - How does a CPU know a device exists and where the position of the device is?
Configuration softrware reads configuration space address 00h (using different bus, device and function numbers). When it gets a response, it knows a device exists at that ID.
Section 2.7.2.2 - In PCIe 2.0 Spec P.128, a Poisoned I/O or Memory Write Request, or a Message with data (except for vendor-defined 25 Messages), that addresses a control register or control structure in the Completer must be handled as an Unsupported Request (UR) by the Completer. The completer receiving this kind of TLP needs to report error as UR or Poison TLP Received?
The intent is for this error case to be handled as a Poisoned TLP Received error. Errata is being developed against the 2.1 Base spec to clarify this. Due to ambiguous language in earlier versions of the spec, a component will be permitted to handle this error as an Unsupported Request, but this will be strongly discouraged.
Section 2.9.1 - For a PCIe 2.0 Switch, when upstream port goes to DL_down, it is stated in pg. 131 line 11 that the config registers will be reset, also line 15 says propagate reset to all other ports (which I interpret as all downstream ports, am I right?)

But on line 11 of pg. 130, it says downstream port registers are not affected except status update, do these contradict?
Yes, when a link reports DL_Down the upsteam port on the switch (and all other downstream devices) are reset. The section 2.9.1 text covers two contexts. The context of a Downstream Port in DL_Down and the context of an Upstream Port in DL_Down. Care must be taken to apply the requirements in this section to the correct context.
Section 5.3.2.3 - Is the following error scenario valid?
- RC sends PME_Turn_off message to EP
- EP doesn't respond with ACK due to delay
- EP responds with PME_TO_Ack message
- EP sends PM_Enter_L23 and not sending ACK.

Can the EP do without ACK?
The Endpoint is required to send an Ack for the PME_Turn_Off message. There is no valid reason for an extended delay of the Ack.
Section 2.2.4.1 - In the PCIe spec 2.0 page 57, there is a sentence "For Memory Read Requests and Memory Write Requests, the Address Type field is encoded as shown in Table 2-5, with full descriptions contained in the Address Translation Services Specification, Revision 1.0." If the value of AT field is invalid, what will PCIe do? Will it report an error, and if so, what error will be reported?
Endpoints that do not support Address Translation Services set the AT field to 00b on transmitted TLPs and ignore the AT field on received TLPs.
Section 4.2.6.10.1 - The Loopback slave should wait until Symbol lock is archived after link speed change during Loopback.Entry substate. However, the base spec does not appear to define whether symbol lock should be archieved on some Lanes or all Lanes.
The Loopback slave transitions to Loopback.Active immediately after exiting Electrical Idle following the link speed change. It attempts to acquire symbol lock on all of the lanes that were active when it entered Loopback.Entry.
Section 4.2.4.3 - What is the purpose of the "inferred" electrical idle?
The purpose of the "inferred" electrical idle is to permit a method of detecting an electrical idle that does not use an analog circuit. Using an analog circuit can be difficult at 5.0 GT/s and the inferred method is an alternate (permitted) method.
Section 4.2.4.1 - What does Link Upconfigure mean? What is it used for?
Link Upconfigure means the device is capable of increasing the link width. When Upconfigure is supported by both devices on a link, the link width may be reduced to conserve power. When link use is going to increase, the devices will increase the link width to support the needed high data rate preferred by the device.